The present invention relates to a display apparatus such as a plasma display (PDP) apparatus. More particularly, the present invention relates to a display apparatus in which the display brightness is determined by the number of times of light emission and in which the number of times of light emission in each cell of the display frame of a display can be changed.
Recently, concerning a display apparatus, demand for a thinner, larger-screen, and a more definite display that can show various information and be set under various conditions are increasing, and a display apparatus that satisfies these demands is expected. There are various types for a thin display apparatus such as LCD, fluorescent display tube, EL, PDP (Plasma Display Panel), and so on. In a display apparatus such as a fluorescent, an EL, or a PDP type, gradation display is attained generally by constructing a display frame of plural subframes, varying each subframe period with a weight, and displaying each bit of the gradation data using corresponding subframes. A description is provided below using a PDP as an example. Since a PDP is widely known, a detailed description of the PDP itself is omitted here and, instead, examples of the gradation display and power control of the subframe method that relates to the present invention is described.
FIG. 1 is a block diagram that shows the general structure of a normal PDP apparatus. In a panel 10, plural X electrodes and Y electrodes are arranged adjacently by turns and plural address electrodes are arranged so as to be perpendicular to the X and Y electrodes. The plural X electrodes are connected commonly and an identical drive signal is applied by an X side common driver 11. The plural Y electrodes are connected to a Y side scan driver 12, individually, and a scanning pulse is applied sequentially in the address period. A Y side common driver 13 is connected to the Y side scan driver 12 and a common drive signal is applied to the Y electrode in the reset period and the sustain discharge period. Address electrodes are connected to an address driver 14, an address pulse is applied in synchronization with the scanning pulse in the address period, and whether the display cell of the row selected by the scanning pulse is lit or not is determined. A control panel 15 internally comprises a display data control part 16, a scan driver control part 17, and a display/power control part 18, and a vertical synchronizing signal Vsync, a dot clock and display data are supplied from outside. The control part 15 has a CPU and each above-mentioned part is realized by hardware and software run by the CPU. Address pulse data is supplied to the address driver 14 from the display data control part 16. The X side common driver 11, the Y side scan driver 12, and the Y side common driver 13 are controlled by the scan driver control part 17.
FIG. 2 is a diagram that shows the drive waveform of a subframe in the PD apparatus of so-called “address/sustain discharge period separated type•write address method.” The subframe will be described later. With reference to FIG. 2, actions in the PD apparatus are described briefly. In this example, a subframe is divided into the reset period, the address period, and the sustain discharge period. In the reset period, all the cells are put into an identical state. In the address period, a scanning pulse is applied to the Y electrode sequentially and an address pulse is applied to the address electrode according to the display data (address data) in synchronization with the application of the scanning pulse. There may be the case in which an address pulse is applied to the Y electrode of a cell that is lit or the case in which an address pulse is applied to the Y electrode of a cell that is not lit. In the cell to which an address pulse is applied, an address discharge is caused to occur and wall charges are accumulated on the electrode of the cell or eliminated. This action is carried out for all the lines. All the cells are thus set to each state according to the display data of the subframe, and the wall charges required for the sustain discharge between the X electrode and the Y electrode of the lit cell are accumulated. In the sustain period, a sustaining pulse is applied to the X electrode and the Y electrode alternately, a discharge is caused to occur in the cell on which wall charges are accumulated, and the cell emits light. In this case, the brightness is determined by the length of the sustain discharge period, that is, the number of times of sustaining pulse.
In a PDP, since there exist only two values, that is, ON or OFF, the gradation is represented by the number of times of light emission. Therefore, as shown in FIG. 3, a frame corresponding to a display is divided into plural subframes and gradation display is attained by the combination of the lit subframes. The brightness of each subframe is determined by the number of the sustaining pulses. Although there may be the case in which the brightness ratio of each subframe is set to a special one in order to control the problem of the animation false contours, the structure of subframes as shown in FIG. 3, in which the brightness ratio is the power of 2, is widely used because the maximum number of gradation scales can be attained for the number of subframes in this structure. In the case of FIG. 3, The ratio of the number of sustaining pulses for the six subframes (SF) 0 through subframes 5 is 1:2:4:8:16:32, and 64 gradation scales can be represented by the combination of these, and each bit of the 6-bit display data can be corresponded to SF0 to SF5, in order. For example, if the display data of a cell is the 25th scale (1A in the hexadecimal system), SF1, SF3, and SF4 are lit, and other SF0, SF2, and SF5 are not lit. The total of the numbers of sustaining pulses in all the subframes in a display frame is referred to as the total light emission pulse number n here. In other words, the total light emission pulse number n is equal to the number of sustaining pulses when all the subframes are lit, or the maximum number of pulses with which a cell can cause light emission during a display frame, and also called the sustain frequency.
The display data supplied from outside has, in general, a format in which the gradation data of each pixel is continuous, and cannot be changed into the subframe format as it is. Therefore, it is once stored in a frame memory provided in the display data control part 16 in FIG. 1, read out according to the subframe format, and supplied to the address driver 14. In each subframe, the action in FIG. 2 is carried out and the subframe differs from each other in the length of the sustain period (that is, the number of sustaining pulses).
When a light screen is displayed, the total number of light emission pulses in a display frame increases and the consumed power, that is, the consumed current also increases. The maximum light emission pulse number in a display frame of the whole screen is reached when all the cells are lit with the total light emission pulse number, and the display load rate is a ratio of the sum of light emission pulsed in all the cells in a display frame to the maximum light emission pulse number. The display load rate is 0% when all the cells are displayed in black, and 100% when all the cells are displayed with the maximum brightness.
In the PDP apparatus, since the current that flows during the sustain period occupies the major part, the consumed current increases if the total number of light emission pulses in a display frame increases. If the number of sustaining pulses in each subframe is fixed, that is, the total light emission pulse number n is a constant, the consumed power P (or consumed current) increases as the display load rate increases.
The limit of the consumed power is specified for the PD apparatus. It may be the case in which the total light emission pulse number n is set so that the consumed power is below the limit when the maximum display load rate is reached, that is, all the cells are displayed with the maximum brightness. The display load rate of a normal screen, however, is between 10% and tens %, and the display load rate seldom becomes near 100%, therefore, in such case, a problem in that the normal display is dark is brought forth. Because of this, a power control, in which the total light emission pulse number n is varied according to the display load rate so that a display as light as possible can be attained without the consumed power P exceeding the limit, is employed.
FIG. 4 is a diagram that shows the structure of a conventional power control part 20 realized in the control part 15, and FIG. 5 is a graph that shows the change in ratio of the total light emission pulses number n and the consumed power P to the display load rate when the control is carried out.
As shown in FIG. 4, the power control part 20 comprises a frame length operation part 21 that calculates the time of a frame (length of a frame) from the vertical synchronizing signal, a load rate operation part 22 that calculates the load rate from the display data, and a sustain frequency operation part 23 that calculates the total light emission pulse number n from the length of a frame and the load rate. As described above, the input video signal is stored in a frame memory in the display data control part 16. At this time, the signal is deployed on the display plane of the frame memory according to the subframe format, read out from each display plane according to the display subframe, and supplied to the address driver 14. The display data control part 16 counts the number of lit pixels for each subframe when storing the input video signal into the frame memory and calculates the display load rate. Therefore, the load rate operation part 22 is installed in the display data control part 16.
The power control part 20 controls as below as shown in FIG. 5: while the display load rate is below A, the total light emission pulse number n is set to n0, and when the display load rate exceeds A, the total light emission pulse number n is reduced to prevent the consumed power P from exceeding the limit. The reduced total light emission pulse number n is allocated as the sustain pulse number of each subframe according to a fixed ratio. For example, as shown in FIG. 6, if it is assumed that a display frame is composed of six SF0 to SF5 as shown in FIG. 3, that the ratio of the sustain discharge pulse numbers is 1:2:4:8:16, and that n0 is equal to 504, the ratio of sustaining pulse numbers of SF0 to SF5 when the display load rate is equal to or less than A is 8:16:62:64:128:256. When the display load rate exceeds A and the total light emission pulse number n is reduced to 252, the ratio of sustaining pulse numbers is, for example, set to 4:8:16:32:64:128. If the display load rate increases further, the numbers of sustaining pulses of each subframe SF0 to SF5 needs to be reduced further. An example case in which the ratio is kept constant is illustrated in FIG. 6, but if the number of sustaining pulses is not a whole number, it is rounded to the nearest whole number.
In the plasma display (PDP) apparatus, heat is generated by the light emission and discharge in each cell, and the amount of generated heat is in proportion to the times of light emission per unit time. Therefore, it can happen that a large amount of heat is generated locally depending on the display pattern and the thermal distribution is developed on the panel surface, resulting in a thermal destruction in an area where a large temperature gradient is caused to occur. One of the patterns that cause such a thermal destruction is, for example, a still display with high contrast. If such a pattern is displayed for a long time, the fluorescent materials, and so on, on the pattern are degraded and a phenomenon called burning occurs, even though thermal destruction may be prevented.
To solve these problems, the structure, in which the display patterns that will cause thermal destruction and burning are detected by the comparison of the image data of successive frames and the brightness is lowered in the case of such display patterns, has been disclosed in Japanese Unexamined Patent Publication (Kokai) No. 8-248819, Japanese Unexamined Patent Publication (Kokai) No. 10-207423, and Japanese Unexamined Patent Publication (Kokai) No. 2000-10522.
To detect, however, the display patterns that will cause thermal destruction and burning by comparing the display data, it is necessary to compare a large amount of image data and calculations. This process requires a calculating unit of high performance and increases the cost of the unit.